By block modellig design and realization of a first order class a log domain filter

Abstract

A first order low pass Class A type log domain filter is synthesized by using computer simulation program (PSpice), and realized in laboratory. For front-end circuitry, i.e. input logging and level shifting part, number of alternatives exist. Two of these alternatives are known as better choices. T type is chosen in this work. The filter has approximately the cutoff frequency of 260 kHz and the transistors in the filter have 10mA DC currents. The filter's cutoff frequency is electronically tunable, i.e. changing the magnitudes of the current sources defines the filter's cutoff frequency. The filter is simulated in PSpice using 'ideal', default PSpice model with BF=10000, and BC546B/BC557B type transistors. Simulation results confirmed with the theoretical results. In laboratory, the filter is realized by using these transistors, not specially designed for log domain filtering, and a number of tests are performed. The laboratory results are compared with those of the simulation results. Due to some nonideal laboratory conditions, some acceptable differences are observed. Although such filters are very sensitive for mismatches and require integration technology, we have observed that realization of this filter in the laboratory has provided satisfactory results.