DVCC-based oating capacitance multiplier design

Abstract

In this paper, a oating capacitance multiplier including two multioutput differential voltage current conveyors, two grounded resistors, and a grounded capacitor is proposed. The proposed oating capacitance multiplier can realize high capacitor values with two small-valued resistors. It is more suitable for integrated circuit technology because it has only grounded passive components without needing any critical passive component matching conditions. Its performances are examined with several simulations using the SPICE program. As an application example, a third-order notch lter using three resistors and three capacitors is given.