Please use this identifier to cite or link to this item: https://hdl.handle.net/11499/46431
Title: A New Simulated Inductor with Reduced Series Resistor Using a Single VCII +/-
Authors: Yuce, Erkan
Safari, Leila
Minaei, Shahram
Ferri, Giuseppe
Barile, Gianluca
Stornelli, Vincenzo
Keywords: simulated inductor
low-series resistor
VCII
voltage conveyor
high-gain VCII
current-mode
ladder filter
band-pass filter
Current Follower
Minimum Number
Lossless
Implementation
Cfoa
Publisher: Mdpi
Abstract: This paper presents a new realization of a grounded simulated inductor using a single dual output second-generation voltage conveyor (VCII +/-) as an active building block, two resistors and one grounded capacitor. The main characteristic of the proposed circuit is that the value of the series resistor can be significantly reduced. Thus, it has the property of improved low-frequency performance. Another feature is the use of a grounded capacitor that makes the proposed circuit attractive for integrated circuit (IC) realization. A simple CMOS implementation of the required VCII +/- is used. However, a single passive component-matching condition is required for the proposed structure. As an application example, a standard fifth-order high-pass ladder filter is also given. SPICE simulations using 0.18 mu m CMOS technology parameters and a supply voltage of +/- 0.9 V as well as experimental verifications, are carried out to support the theory.
URI: https://doi.org/10.3390/electronics10141693
https://hdl.handle.net/11499/46431
ISSN: 2079-9292
Appears in Collections:Mühendislik Fakültesi Koleksiyonu
Scopus İndeksli Yayınlar Koleksiyonu / Scopus Indexed Publications Collection
WoS İndeksli Yayınlar Koleksiyonu / WoS Indexed Publications Collection

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