Please use this identifier to cite or link to this item:
https://hdl.handle.net/11499/6792
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DC Field | Value | Language |
---|---|---|
dc.contributor.author | Yüce, Erkan | - |
dc.contributor.author | Minaei, S. | - |
dc.date.accessioned | 2019-08-16T12:11:00Z | |
dc.date.available | 2019-08-16T12:11:00Z | |
dc.date.issued | 2009 | - |
dc.identifier.issn | 0278-081X | - |
dc.identifier.uri | https://hdl.handle.net/11499/6792 | - |
dc.identifier.uri | https://doi.org/10.1007/s00034-008-9093-0 | - |
dc.description.abstract | In this paper, a method for reducing the parasitic impedance effects of the current feedback operational amplifiers (CFOAs) in an inductor simulator at low frequencies is proposed. Also, two novel grounded inductors employing a current follower (CF) and a second generation current conveyor (CCII) are given to illustrate the parasitic reduction technique clearly. The low frequency restrictions of the proposed inductors due to terminal parasitic resistances can be improved by using the presented parasitic impedance reduction technique. SPICE simulations show that the presented inductor employing CFOAs in a voltage-mode (VM) band-pass and high-pass filter application has lower parasitic effects at low frequencies. In addition to simulation results, experimental test results are given to verify the theory. © Birkhäuser Boston 2009. | en_US |
dc.language.iso | en | en_US |
dc.relation.ispartof | Circuits, Systems, and Signal Processing | en_US |
dc.rights | info:eu-repo/semantics/closedAccess | en_US |
dc.subject | CCII | en_US |
dc.subject | CF | en_US |
dc.subject | CFOA | en_US |
dc.subject | Grounded inductor simulators | en_US |
dc.subject | Parasitic impedance effects | en_US |
dc.subject | Electric converters | en_US |
dc.subject | Electric inductors | en_US |
dc.subject | Electric potential | en_US |
dc.subject | High pass filters | en_US |
dc.subject | Operational amplifiers | en_US |
dc.subject | Simulators | en_US |
dc.subject | Heterojunction bipolar transistors | en_US |
dc.title | On the realization of simulated inductors with reduced parasitic impedance effects | en_US |
dc.type | Article | en_US |
dc.identifier.volume | 28 | en_US |
dc.identifier.issue | 3 | en_US |
dc.identifier.startpage | 451 | |
dc.identifier.startpage | 451 | en_US |
dc.identifier.endpage | 465 | en_US |
dc.identifier.doi | 10.1007/s00034-008-9093-0 | - |
dc.relation.publicationcategory | Makale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanı | en_US |
dc.identifier.scopus | 2-s2.0-67651207188 | en_US |
dc.identifier.wos | WOS:000266651800007 | en_US |
dc.identifier.scopusquality | Q3 | - |
dc.owner | Pamukkale University | - |
item.languageiso639-1 | en | - |
item.fulltext | No Fulltext | - |
item.openairecristype | http://purl.org/coar/resource_type/c_18cf | - |
item.cerifentitytype | Publications | - |
item.openairetype | Article | - |
item.grantfulltext | none | - |
crisitem.author.dept | 10.04. Electrical-Electronics Engineering | - |
Appears in Collections: | Mühendislik Fakültesi Koleksiyonu Scopus İndeksli Yayınlar Koleksiyonu / Scopus Indexed Publications Collection WoS İndeksli Yayınlar Koleksiyonu / WoS Indexed Publications Collection |
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